1. Field of the Invention
The present invention relates generally to semiconductor integrated circuits and particularly to semiconductor integrated circuit temperature detection technology or control technology based the temperature detection.
2. Description of the Background Art
In semiconductor integrated circuits, temperature variation contributes to an impaired drive ability of a transistor or the like. This impairs the circuit's performance.
To address this, Japanese Patent Laying-Open No. 7-249739 discloses a temperature detection circuit utilizing that an inverter's transmission delay time varies with temperature.
This allows a semiconductor integrated circuit's internal temperature to be detected.
As described in the document, however, the temperature detection circuit has a complicated configuration as it is configured with a plurality of transmission gates connected.
Furthermore in this temperature detection circuit a range of temperature to be detected can be selected from a plurality of ranges of temperature. More specifically, a plurality of routes are provided with inverters, respectively, and when a range of temperature to be detected is selected a route corresponding to the selected range of temperature is selected and the selected route's inverter is used, while the other routes' inverters are not used. That is, such redundancy disadvantageously increases the circuit's scale.